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Unregistered 24th June 2017 02:55 PM

F.Y.B.Sc Syllabus University of Mumbai
 
My brother has taken admission in B.SC Course at University of Mumbai recently. He wants syllabus of First Year (F.Y) B.SC Course. So do you know from where He can download syllabus of this Course of University of Mumbai?

sumit 24th June 2017 03:03 PM

Re: F.Y.B.Sc Syllabus University of Mumbai
 
1 Attachment(s)
As you want to download syllabus of First Year B.SC Course of University of Mumbai, so here I am providing following syllabus:

University of Mumbai B.SC First Year Syllabus

Semester I
USCS101 Core Subject Computer Organization and Design
USCS102 Core Subject Programming with Python- I
USCS103 Core Subject Free and Open Source Software
USCS104 Core Subject Database Systems
USCS105 Core Subject Discrete Mathematics
USCS106 Core Subject Descriptive Statistics and Introduction to Probability
USCS107 Ability Enhancement Course 1 Soft Skills Development
USCSP01 Core Subject Practical Practical of USCS101 + USCS102 +
USCS103+USCS104+USCS105+USCS106

Semester II
USCS201 Core Subject Programming with C
USCS202 Core Subject Programming with Python-II
USCS203 Core Subject Linux
USCS204 Core Subject Data Structures
USCS205 Core Subject Calculus
USCS206 Core Subject Statistical Methods and Testing of Hypothesis
USCS207 Ability Enhancement Course 2 Green Technologies
USCSP02 Core Subject Practical Practical of USCS201 + USCS202 +
USCS203+USCS204+USCS205+USCS206

Computer Organization and Design

Unit I
Computer Abstractions and Technology: Basic structure and operation of a computer, functional units and their interaction. Representation of numbers and characters.
Logic circuits and functions:
Combinational circuits and functions: Basic logic gates and functions, truth tables; logic circuits and functions. Minimization with Karnaugh maps. Synthesis of logic functions with and-or-not gates, nand gates, nor gates. Fan-in and fan-out requirements; tristate buffers. Half adder, full adder, ripple carry adder.
(Flip flops) Gated S-R and D latches, edge-triggered D latch. Shift registers and registers. Decoders, multiplexers.
Sequential circuits and functions: State diagram and state table; finite state machines and their synthesis.

Unit II
Instruction set architectures:
Memory organization, addressing and operations; word size, big-endian and littleendian arrangements. Instructions, sequencing. Instruction sets for RISC and CISC (examples Altera NIOS II and Freescale ColdFire). Operand addressing modes; pointers; indexing for arrays. Machine language, assembly language, assembler directives. Function calls, processor runtime stack, stack frame. Types of machine instructions: arithmetic, logic, shift, etc. Instruction sets, RISC and CISC examples.

Unit III
Basic Processor Unit:
Main components of a processor: registers and register files, ALU, control unit, instruction fetch unit, interfaces to instruction and data memories. Datapath. Instruction fetch and execute; executing arithmetic/logic, memory access and branch instructions; hardwired and microprogrammed control for RISC and CISC.
Basic I/O:
Accessing I/O devices, data transfers between processor and I/O devices. Interrupts and exceptions: interrupt requests and processing.

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