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Sathyabama Institute of Science and Technology B.E. - Electronics and Instrumentation Engineering SECA1201 Digital Logic Circuits Syllabus SATHYABAMA INSTITUTE OF SCIENCE AND TECHNOLOGY SCHOOL OF ELECTRICAL AND ELECTRONICS SECA1201 DIGITAL LOGIC CIRCUITS L T P Credits Total Marks 3 0 0 3 100 UNIT 1 NUMBER SYSTEMS, LOGIC FUNCTIONS AND BOOLEAN ALGEBRA 9 Hrs. Number systems – Number systems conversions - Binary arithmetic – Binary codes – Logic functions-Universal gate functions - Boolean algebra – Functionally complete operation sets, Reduction of switching equations using Boolean algebra, Realization of switching function. UNIT 2 DESIGN OF COMBINATIONAL LOGIC 9 Hrs. Design procedure of Combinational Logic – Design of two level gate networks -Sum of Products (SOP) - Product of Sums(POS) - Canonical SOP - Canonical POS - Karnaugh Map - Simplifications of Boolean functions using Karnaugh Map and implementation using Logic function – Advantages and limitations of K-Map - Tabulation method - Simplifications of Boolean functions using Tabulation method. UNIT 3 COMBINATIONAL CIRCUITS 9 Hrs. Introduction to Combinational circuits – Half Adder, Full Adder - Half Subtractor, Full Subtractor- Parallel binary Adder, Parallel binary Subtractor - Carry look ahead Adder- BCD Adder- Decoders- Encoders - Priority Encoder- Multiplexers- MUX as universal combinational modules- Demultiplexers- Code convertors- Magnitude Comparator. UNIT 4 SEQUENTIAL CIRCUITS 9 Hrs. Introduction to Sequential circuits – Flip flops – SR, JK, D and T flip flops, Master Slave flip flop, Characteristic and excitation table – Realization of one flip flop with other flip flops – Registers – Shift registers – Counters – Synchronous and Asynchronous counters – Modulus counters – Ring Counter – Johnson Counter – State diagram, State table, State minimization – Hazards. UNIT 5 DIGITAL LOGIC FAMILIES, MEMORIES AND PROGRAMMABLE DEVICES 9 Hrs. Classification and characteristics of logic family – Bipolar logic family – Saturated logic family – Non saturated family – Unipolar family – MOS, CMOS logic families. Classification and Organization of memories – Programmable Logic Devices – Programmable Logic Array(PLA) – Programmable Array Logic (PAL) – Field Programmable Gate Arrays (FPGA). Max. 45 Hrs. COURSE OUTCOMES On completion of the course, student will be able to CO1 - Classify various types of Digital Number systems and Boolean algebra. CO2 - Illustrate Combinational logic. CO3 - Design and implement the digital circuit using combinational logic. CO4 - Design and implement the digital circuit using sequential logic. CO5 - Illustrate the digital logic families. CO6 - Solve the arithmetic expressions using memories and programmable logic devices and implement memory units with Programmable logic devices. TEXT / REFERENCE BOOKS 1. John M. Yarbrough, “Digital logic: Applications and Design”, Thomas - Vikas Publishing House, 2002. 2. Morris Mano, “Digital design-With an Introduction to the Verilog HDL”, 5th Edition, Pearson, 2013. 3. R.P.Jain, “Modern Digital Electronics”, 4th Edition, TMH, 2010. 4. Thomas L Floyd, “ Digital Fundamentals”, 11th Edition, Pearson, 2015. 5. William H. Gothmann, “Digital Electronics”, Prentice Hall, 2001. END SEMESTER EXAMINATION QUESTION PAPER PATTERN Max. Marks: 100 Exam Duration: 3 Hrs. PART A: 10 Questions of 2 marks each-No choice 20 Marks PART B: 2 Questions from each unit of internal choice; each carrying 16marks 80 Marks |
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