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Sathyabama Institute of Science and Technology B.E. - Electronics and Communication SATHYABAMA INSTITUTE OF SCIENCE AND TECHNOLOGY SECA3004 COMPUTER ARCHITECTURE AND OPERATING SYSTEMS UNIT 1 INTRODUCTION 9 Hrs. Central Processing Unit - Introduction - General Register Organization - Stack organization -- Basic computer Organization - Computer Registers - Computer Instructions - Instruction Cycle. Arithmetic ,Logic, Shift Microoperations- Arithmetic Logic Shift Unit - case study- stack organization in Motorola 6800. UNIT 2 CONTROL UNIT DESIGN AND MULTIPROCESSORS 9 Hrs. Microprogrammed Control: Control memory - address sequencing - Microprogram Example- Design of Control unit - Example Processor design, Multiprocessors: Characteristics- Interprocessor Arbitration- Interprocessor Communication UNIT 3 MEMORY AND I/O SYSTEM 9 Hrs. Memory Organization : Memory Hierarchy - Main memory - Associative Memory - Cache Memory - Virtual memory Input - Output Organization : Peripheral Devices - I/O Interface, Modes of transfer - Priority Interrupt - DMA - IOP - Serial Communication-Case study-virtual memory in 80286 processor. UNIT 4 OPERATING SYSTEM 9 Hrs. Introduction - System components - OS services Process Management: Processes - Process concepts - Process scheduling-- CPU scheduling Scheduling algorithms - Preemptive strategies - Non-preemptive strategies. Case study- Introduction System components - OS services Process Management: Processes - Process concepts - Process scheduling- - CPU Scheduling algorithms - Preemptive strategies - Non-preemptive strategies. Case study-Scheduling algorithms in UNIX. UNIT 5 DEADLOCKS AND MEMORY MANAGEMENT 9 Hrs. The critical section problem - Semaphores - Deadlocks - Deadlock characterization - Prevention - Avoidance - Detection - Recovery. Storage Management Strategies - Contiguous vs. non-contiguous storage allocation- Paging - Segmentation - Paging/Segmentation systems, Page replacement strategies, Case study-paging and segmentation in UNIX. Max. 45 Hrs. COURSE OUTCOMES On completion of the course, student will be able to CO1 - Understand the micro level dataflow in various units of computer. CO2 - Demonstrating the impact of control memory operations and multi-process or characteristics. CO3 - Examining the different types of memory and experimenting the mapping techniques. CO4 - Select the suitable process scheduling technique for optimized function of operating systems. CO5 - Critically upraising the deadlock in CPU and other memory management techniques. CO6 - Design and Developing optimized architecture for stand-alone applications. TEXT / REFERENCE BOOKS 1. M.Morris Mano, "Computer System Architecture”, Pearson Publishers, Revised, 3rd Edition, 2017. 2. Abraham Silberschatz, Peter Galvin and Gagne, “Operating System Concepts”, 6th Edition, Addison Wesley, 2017. 3. William Stallings, "Computer Organization and Architecture - Designing for Performance", 9th Edition, Pearson Education, 2012. 4. John P. Hayes, "Computer Architecture and Organization", 3rd Edition, Tata McGraw Hill, 2012. 5. John L. Hennessey, David A. Patterson, "Computer Architecture – A Quantitative Approach", Morgan Kaufmann / Elsevier Publishers, 5th Edition, 2012. END SEMESTER EXAMINATION QUESTION PAPER PATTERN Max. Marks: 100 Exam Duration: 3 Hrs. PART A: 10 Questions of 2 marks each – No choice 20 Marks PART B: 2 Questions from each unit of internal choice; each carrying 16 marks 80 Marks |
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